搜索资源列表
I2C_interface
- i2c interface with master-slave control
iic_01
- 16f877 硬件I2C主，已经调试通过，有数码显示-16f877 hardware I2C master, has been debugged, a digital display
I2C_control
- Xilinx提供的I2C控制器代码,Master/Slave全功能- Readme File for I2C Customer Pack Created: 7/8/99 ALS Revised: 11/4/99 ALS ******************************************************************************************************************************
I2C_EEPROM_RW
- I2C master设备的verilog实现，验证了对eeprom的读写-I2C master eeprom
I2C
- I2C总线的工作原理,I2C总线驱动程序的设计和调试方法,掌握I2C总线存储器的读写方法 用LED显示学号 -Digital pipe display their student id the I2C bus common sense the I2C bus principle of work, the I2C bus driver design and debug method, and master the I2C bus and memory method Use LED di
C51I2C
- C51 I2C接口驱动，IO口模拟I2C(主+从)-C51 I2C interface driver, IO port simulation of I2C (master+ slave)
EEPROM
- EEPROM读写实验，通过I2C进行读写 熟悉并掌握（存储芯片AT2402）的操作，有保存和读取操作 -EEPROM read and write experiments, read and write familiar with and through the I2C master (memory chips AT2402) operation, a save and read operations
EDA_FPGA_240i2c-master-slave
- 用硬件语言实现的I2C程序，主从都包括，从而实现主从之间的通信-Using the I2C hardware language program, including master and slave are, in order to achieve the communication between master and slave
MSP430FR57xx_uscib0_i2c_04
- MSP430FR57xx Demo - USCI_B0 I2C Master RX single bytes from MSP430 Slave Descr iption: This demo connects two MSP430 s via the I2C bus. The master reads from the slave. This is the MASTER CODE. The data from the slave transmitter begins at 0
i2c
- LPC900单片机1主多从通信实例,带电路图-LPC900 microcontroller a master multi-slave communication examples
i2c_latest[1].tar
- I2C is a two-wire, bidirectional serial bus that provides a simple, efficient method of data exchange between devices. It is primarily used in the consumer and telecom market sector and as a board level communications protocol. The OpenCores I2C Mast
I2C_master
- 利用仿顺序的思想设计I2C-Master功能模块，便于理解，利用该模块在上电时对CMOS芯片GC0307的寄存器初始化。-Imitation of the design ideas in order to use I2C-Master modules, easy to understand, the use of the power module CMOS chips GC0307 when the register initialization
i2c_master_slave_core_latest.tar
- This design is Wishbone compatible I2C core. This core can work as I2C master as well as slave. VMM Test-bench is also available.
i2c_controller
- 采用Verilog语言实现I2C master controller的示例，有测试程序-The Verilog language implementation the I2C master controller example, testing program
avrlib-by-Procyon
- AVR的库C程序源代码，功能包括 Timer(s)，Uart(s)，A/D Converter，I2C Master/Slave，SPI Interface，Byte Buffering (circular)，Bit Buffering (linear)，Printf and other formatted print functions，VT100 Terminal Output，Command Line Interface，FAT16/32 File System (support is r
doc2561
- Using the USI module as a I2C master for atmega avr.
i2c_master_byte_ctrl
- i2c core : i2c master byte control
i2c_master_top
- i2c core : i2c master top
LM3S9B92_I2C_Driver
- LM3S9B92平台下I2C主模式下驱动程序，已调试通过-The LM3S9B92 platform I2C master mode, the driver has been through debugging
i2c_master_byte_ctrl
- I2C控制，I2c master-bitctrl。v控制信号-I2C CONTROL